Interrupts can be used for a variety of applications. Each of these interrupt applications requires a separate interrupt input. If we are working with an 8085 microprocessor we get TRAP, RST7.5, 6.5, 5.5 and INTR interrupts inputs. For applications where we have multiple interrupt sources we have to use external device called a priority interrupt controller (PIC). By connecting such a device it is possible to increase the interrupt handling capacity of the microprocessor. The 8259A is a commonly used priority interrupt controller, which is specifically designed for use with interrupt signals INTR and INTA of Intel series. It is packaged in a 28 pin DIP. It uses NMOS technology and requires a single +5V supply.

Features of 8259A

It can manage eight priority interrupts. This is equivalent to providing eight interrupt pins on the processor in place of INTR pin.
It is possible to locate vector table for these additional interrupts anywhere in the memory map. However, all eight interrupts are spaced at the interval of either four or eight locations.
By cascading nine 8259s it is possible to get 64 priority interrupts.
Interrupt mask register makes it possible to mask individual interrupts request .
It can be programmed to accept either the level of triggered or triggered interrupt request.
With the help of this user can get the information of pending interrupt in service interrupts and mask interrupts.
The 8259 A is designed to minimize the software and the real time overhead handling multilevel priority interrupts.